http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/ Design-Oriented_Analysis_D-OA Design Oriented Analysis Tue, 16 Jun 2009 18:16:59 GMT Frank Wiedmann http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/227 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/227 ... The timesteps of your transient simulation might be too large for the oscillation frequency of your circuit. You could try to start the oscillation by Fri, 12 Jun 2009 11:03:51 GMT carmen82_kee http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/224 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/224 Sorry, i re-upload the waveform again. http://www.flickr.com/photos/39362887@N04/3618572017/ Fri, 12 Jun 2009 09:22:51 GMT carmen82_kee http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/223 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/223 Hi all, I used stb analysis from Cadence ADE to get the loop gain and loop phase of stability of my LDO. For high ESR value, the stb analysis shown that the Wed, 03 Jun 2009 19:39:56 GMT stevie_ong8 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/219 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/219 Hi Frank and Rob, Thanks for your inputs. I tried using 3 methods 1) Middle brook approach 2) stb analysis with back to back balun and iprobe 3) stb analysis Wed, 03 Jun 2009 18:54:02 GMT stevie_ong8 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/218 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/218 Hi Frank and Rob, Thanks for your inputs. I tried using 3 methods 1) Middle brook approach 2) stb analysis with back to back balun and iprobe 3) stb analysis Wed, 03 Jun 2009 18:39:53 GMT stevie_ong8 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/217 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/217 Hi Frank and Rob, Thanks for your inputs. I tried using 3 methods 1) middlebrook approach 2) stb analysis with balun back to back and iprobe 3) stb analysis Wed, 03 Jun 2009 18:35:58 GMT stevie_ong8 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/216 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/216 Hi Frank and Rob, Thanks for your inputs. I tried using 3 methods 1) Middle brook approach 2) stb analysis with back to back balun and iprobe 3) stb analysis Wed, 03 Jun 2009 18:24:15 GMT Robert Fox http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/215 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/215 It sounds to me like you're using the analyses right. How are you modeling asymmetry in your op amp? Unless you've intentionally included some accounting for Wed, 03 Jun 2009 17:49:30 GMT stevie_ong8 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/214 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/214 Hi Frank and Rob, Thanks for your inputs. I tried using 3 methods 1) Middle brook approach 2) stb analysis with back to back balun and iprobe 3) stb analysis Tue, 02 Jun 2009 07:40:05 GMT Frank Wiedmann http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/211 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/211 ... Regarding simulation, Cadence has a cmdmprobe component in analogLib that can be used to simulate differential-mode and common-mode loop gain. See Mon, 01 Jun 2009 14:02:25 GMT Robert Fox http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/210 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/210 Frank is the best person to explain how to compute loop gains in a simulator. iprobe is an ammeter element defined in Cadence's Spectre. Spectre has a built-in Mon, 01 Jun 2009 10:52:27 GMT stevie_ong8 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/209 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/209 Thanks for your reply, Frank. It really helps a lot. So basically, I managed to get the differential loop gain using test bench as shown at: Mon, 01 Jun 2009 09:23:25 GMT Frank Wiedmann http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/208 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/208 ... This effect can often be seen if a differential circuit is slightly asymmetric, for example due to mismatch. From a stability point of view, there is no Mon, 01 Jun 2009 05:38:31 GMT stevie_ong8 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/207 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/207 Please refer to the waveform results http://www.flickr.com/photos/39059652@N08/3583842251/ Mon, 01 Jun 2009 05:31:19 GMT stevie_ong8 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/206 http://groups.yahoo.com/group/Design-Oriented_Analysis_D-OA/message/206 Hi Rob, Thanks for your reply. Appreciate it a lot. I tried running the differential-mode loop gain for the entire fully differential amplifier circuit with