http://tech.groups.yahoo.com/group/FPGA_CV/ FPGA Computer Vision Mon, 30 Nov 2009 11:23:18 GMT Reza Mirfayzi http://tech.groups.yahoo.com/group/FPGA_CV/message/37 http://tech.groups.yahoo.com/group/FPGA_CV/message/37 Thanks Dear John Hi Moin Here is little more. To add more to what john has mentioned in ISE 11 that is a FIFO generator inside the core generator will help you Mon, 30 Nov 2009 08:13:39 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/36 http://tech.groups.yahoo.com/group/FPGA_CV/message/36 ooops made an error with the link to my FPGA page and system09: Try this: http://members.optusnet.com.au/jekent/FPGA.htm John. ... -- Mon, 30 Nov 2009 07:59:06 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/35 http://tech.groups.yahoo.com/group/FPGA_CV/message/35 I should add, the number of Block RAMs depends on the size of the FPGA you are using. ... -- http://www.johnkent.com.au http://members.optusnet.com.au/jekent Mon, 30 Nov 2009 07:57:09 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/34 http://tech.groups.yahoo.com/group/FPGA_CV/message/34 Hi Moin, Sorry for the delay in replying, but I was hoping someone else might take the initiative to answer your question. I have not used the Virtex 5 FPGAs. Sun, 29 Nov 2009 05:11:25 GMT moin http://tech.groups.yahoo.com/group/FPGA_CV/message/33 http://tech.groups.yahoo.com/group/FPGA_CV/message/33 Hi All, I am relatively new to working on FPGAs and using VHDL. I needed to know what I should look at to help me understand how to use the Block RAMs in the Sat, 14 Nov 2009 03:34:12 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/32 http://tech.groups.yahoo.com/group/FPGA_CV/message/32 I'm working on a fast skeleton operator. I'm prototyping the algorithm in Matlab with the hope of implementing it in hardware. RMIT University here in Sun, 27 Sep 2009 05:46:30 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/31 http://tech.groups.yahoo.com/group/FPGA_CV/message/31 Hi Christian, SRI stands for Stanford Research Institute. I'm not 100% sure what all the SRI parameters are, but they include things like the major and minor Sun, 27 Sep 2009 03:02:53 GMT friendfx http://tech.groups.yahoo.com/group/FPGA_CV/message/30 http://tech.groups.yahoo.com/group/FPGA_CV/message/30 Hi John, thanks for the information about employment and the TV show (though I haven't watched it yet, but it sounds fun!). What is SRI? What I find most Thu, 24 Sep 2009 13:35:00 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/29 http://tech.groups.yahoo.com/group/FPGA_CV/message/29 I received an email from the people at Infomus Labs to say they have fixed the problem with the Eyesweb installer. I've downloaded the code again and it Thu, 24 Sep 2009 09:17:52 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/28 http://tech.groups.yahoo.com/group/FPGA_CV/message/28 Hi Christian, I worked at the CSIRO in the mid 1990s. They developed an Area Parameter Accelerator that generated SRI parameters for the blobs. The Thu, 24 Sep 2009 07:10:39 GMT Christian Gelinek http://tech.groups.yahoo.com/group/FPGA_CV/message/27 http://tech.groups.yahoo.com/group/FPGA_CV/message/27 Hello everyone, my name is Christian and I have developed image processing systems based on FPGAs during the last 6 years. ... I don't have this book, but Wed, 23 Sep 2009 00:27:54 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/26 http://tech.groups.yahoo.com/group/FPGA_CV/message/26 Hi Has anyone seen this web site ? http://www.eyesweb.org/ It's a motion analysis package from InfoMus lab at the university of Genoa in Italy. It's not Fri, 14 Aug 2009 07:23:11 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/25 http://tech.groups.yahoo.com/group/FPGA_CV/message/25 Anxo, You mentioned the the Spartan 3A Video processing board. I wonder if you or anyone else has used or seen the the Altera Audio Video Development Kit using Tue, 16 Jun 2009 07:46:26 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/24 http://tech.groups.yahoo.com/group/FPGA_CV/message/24 EETimes are also conducting a Multicore Virtual Conference. It's the last 3 days to register. http://www.eetimes.com/multicore/multicore_content/index.jhtml It Tue, 16 Jun 2009 07:34:14 GMT John Kent http://tech.groups.yahoo.com/group/FPGA_CV/message/23 http://tech.groups.yahoo.com/group/FPGA_CV/message/23 Dear FPGA_CV membesr, There is a digital image computing conference being held by Victoria University from December 1 -3 2009 here in Melbourne Australia. I