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    <title>cmos_vlsi at Yahoo! Groups</title>
    <link>http://tech.groups.yahoo.com/group/cmos_vlsi/</link>
    <description>&lt; CMOS Circuit Design &amp; Technology &gt;</description>

    <item>
      <title>Check out my Facebook profile</title>
      <pubDate>Sun, 22 Feb 2009 07:37:01 GMT</pubDate>
      <dc:creator>Ravi Shankar Prasad</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3018</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3018</guid>
      <description>Hi Cmos_vlsi, I set up a Facebook profile where I can post my pictures, videos and events and I want to add you as a friend so you can see it. First, you need</description>
    </item>
    <item>
      <title>Imp :- Plz Make Note of my temporary contact .</title>
      <pubDate>Sun, 19 Oct 2008 08:57:26 GMT</pubDate>
      <dc:creator>Ravi Shankar Prasad</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3017</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3017</guid>
      <description>Hi, My old Mobile number is deactivated. I am in process of getting a new mobile. will update you as soon as it is done. Till then plz keep in touch through</description>
    </item>
    <item>
      <title>is it helpful for u?</title>
      <pubDate>Fri, 15 Aug 2008 23:32:59 GMT</pubDate>
      <dc:creator>Eisha .</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3016</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3016</guid>
      <description>Hi Friends, I have a great website for you. Please check design, functionality &amp; very help full material and response me. I hope it will be very helpful to</description>
    </item>
    <item>
      <title>Hot opeing at Microchip,Bangalore ... reply with your latest resume!</title>
      <pubDate>Tue, 01 Apr 2008 11:02:14 GMT</pubDate>
      <dc:creator>Karudan Karudan</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3015</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3015</guid>
      <description>1.       ERP Software QA and Test Analyst          --------------             1 position Position Summary ?         As an ERP Software QA and Test Analyst,</description>
    </item>
    <item>
      <title>Very good opening at Microchip,Bangalore</title>
      <pubDate>Mon, 07 Jan 2008 03:23:54 GMT</pubDate>
      <dc:creator>Karudan Karudan</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3014</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3014</guid>
      <description>1.      Software Engineer ? Compiler - 3 Positions ? HOT JOB Exp: 2- 6yrs Skills: C compiler Position Summary -        Analyze, design and implement highly</description>
    </item>
    <item>
      <title>about conditional timing check</title>
      <pubDate>Tue, 21 Aug 2007 11:50:20 GMT</pubDate>
      <dc:creator>Vijay Bagalad</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3013</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3013</guid>
      <description>Hi, Is there anyway to do conditional setup and hold violation checks. I have flop and D is driven by andgate with 4 inputs. I would like to check setup and</description>
    </item>
    <item>
      <title>svm question...</title>
      <pubDate>Sun, 12 Aug 2007 15:02:04 GMT</pubDate>
      <dc:creator>Sancy Apuya</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3012</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3012</guid>
      <description>does anyone has his opinion on why do we need to have a large noise margin signal in CMOS??</description>
    </item>
    <item>
      <title>lcd interfacing with fpga</title>
      <pubDate>Sun, 12 Aug 2007 15:01:06 GMT</pubDate>
      <dc:creator>RAMANANDA</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3011</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3011</guid>
      <description>hi, how to interface dot matrix lcd display with the fpga.  i have idea about 7-segment display but not with dot matrix display. i am doing project with</description>
    </item>
    <item>
      <title>pucknell book needed</title>
      <pubDate>Sun, 12 Aug 2007 14:59:21 GMT</pubDate>
      <dc:creator>sasank</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3010</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3010</guid>
      <description>hi all can any one send me the soft copy of pucknell book for Basic VLSI design thanks in advance</description>
    </item>
    <item>
      <title>Shwetta here.</title>
      <pubDate>Sun, 12 Aug 2007 14:59:13 GMT</pubDate>
      <dc:creator>shwetta sharma</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3009</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3009</guid>
      <description>Hi All, We&#39;ve Couple of openings in North india as well as in South india.We required junior level positions as well as Senior level position in ASIC/VLSI/High</description>
    </item>
    <item>
      <title>how can we say how many gates available in a pld&#39;s (fpga/cpld)</title>
      <pubDate>Sun, 12 Aug 2007 14:58:41 GMT</pubDate>
      <dc:creator>RAMANANDA</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3008</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3008</guid>
      <description>hi, i have a doubt about gate count of fpga. i saw one project bidding paper, he has mentioned that, he  require 3-millions of gates fpga. how can we search</description>
    </item>
    <item>
      <title>hi....</title>
      <pubDate>Sun, 12 Aug 2007 14:58:11 GMT</pubDate>
      <dc:creator>Sancy Apuya</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3007</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3007</guid>
      <description>i am a novice on CMOS technology...i am proposing a thesis on design and simulation of 4 bit binary adder using CMOS technology... can anyone gave me links</description>
    </item>
    <item>
      <title>BiCMOS</title>
      <pubDate>Sun, 12 Aug 2007 14:57:38 GMT</pubDate>
      <dc:creator>moh_atef2000</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3006</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3006</guid>
      <description>I tried hardly to get information about the design of the layout BiCMOS analoge circuits. How i can get these information?</description>
    </item>
    <item>
      <title>*  ASIC,  RF  &amp;  DFT  Designers  for  Fortune Client  Urgent  above</title>
      <pubDate>Sun, 12 Aug 2007 14:57:37 GMT</pubDate>
      <dc:creator>Mayur ashra</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3005</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3005</guid>
      <description>Dear Friends, Our esteemed Clients who are well known Fortune - MNC - CMM Level 5 Software  Development Organization,  based at Bangalore. Kindly mail me yoru</description>
    </item>
    <item>
      <title>verilog counter with asynchronous reset and load</title>
      <pubDate>Sun, 12 Aug 2007 14:56:56 GMT</pubDate>
      <dc:creator>RAMANANDA</dc:creator>
      <link>http://tech.groups.yahoo.com/group/cmos_vlsi/message/3004</link>
      <guid isPermaLink="true">http://tech.groups.yahoo.com/group/cmos_vlsi/message/3004</guid>
      <description>hi,

up counter operation with asynchronous reset and asynchronous load

output enable signal (op_en) is high when counter is running else 0.

after the load</description>
    </item>

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